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E-beam test system Spatial resolution of 0.1 microns Dimensions: 2300 x 2200 x 1700 mm Weight: 1100kg Includes Manual and Specifications Needs oil change for cathode exchange 2000 vintage.

Tester, 2005 vintage.

Testers, SoC T2000MS 52-Slot Frame 512 Digital Channels 1 DM250MHz Module (32 channels) 15 DM125MHz Modules (480 channels) (2) LCDPS Modules (2) HCDPS Modules DVM Mux 2M AFM/6TE/PPU 128M TTB/SCPG/ALPG Engineering Workstation with Flat Panel Monitor System Desk GPIB Interface Hifix Performance Board 2006 vintage As-is, where-is.

Testers, SoC, 8", 2006 vintage.

IC Testers, 6" - 8", 128 / 256 Ch, 25 MHz.

VLSI test systems, 1993-1995 vintage.

IC Tester, good condition Includes: Sparc 5 model 110 (HKSUN1) 2 Intest test columns Liebert precision power Condition is operational.

IC Testers, 6" - 8", pin count: 256, operational, 1995 - 1996 vintage.

VLSI test systems, 1995 vintage.

Testers, 8” (Qty 2) STE Memory 2MW Interfaced P-8 Chiller: -10°C ~ +150°C STE Memory 256K, Interfaced UF200 & APM-90A (Qty 2) STE Memory 256K, No prober STE Memory 1MW (1st) Interfaced UF200 Chiller: -40°C ~ +150°C Currently De-installed Working condition 1998 vintage.

Memory Test system with 2 testheads.

Memory Tester Parts Machine Currently stored in a warehouse.

Test system, parts machine.

Test systems, interfaced with (Qty 2) head delta flex handlers, many available.

Test system, 2002 vintage.

DRAM test systems, 8" Currently installed 2000-2003 vintage.

Memory Test system Pin Count: Driver: 576, I/O:288 Frequency: 30 MHz O.S.Version: ASX/U-50 6.04-1 ALPG X:16bits, Y:16bits DC: 16 10 V PPS: 32 F.M.Module: 8M MRA Type: MRAII number of CBU board: 2 number of FBM: 576Mx8 Compression Function OTA: 1ns Hard Disk Capacity: 17G Communication Type: GPIB Power Comsumption 20KVA Workstation: Sun Sparc-5 TH Mother Board ( Advantest Standard): H7-0555X01.

Memory Tester Currently stored in a warehouse.

Testers, 8" Many available.

Memory Test system (1) Testhead PIN Option1 MRA 2 (Memory Repair Analyser) Good condition, dismantled by OEM, 1996 vintage.

Memory Test system Pin Count: Driver: 288, I/O: 144 Frequency: 30 MHz O.S.Version: ASX/U-506.04-1 ALPG X:16bits, Y:16bits DC: 8 10 V PPS: 16 F.M.Module: 1M MRA Type: MRAII Number of CBU board: 2 Number of FBM: 144Mx4 OTA: 1ns Hard Disk Capacity: 2.1G Communication Type: GPIB Power Comsumption: 14KVA Workstation: Sun Sparc-5 TH Mother Board: (Advantest Standard): H7-0037x01.

Memory Test system Pin Count: Driver: 288, I/O: 144 Frequency: 30 MHz O.S.Version: ASX/U-506.04-1 ALPG X:16bits, Y:16bits DC: 8 10 V PPS: 16 HV PPS: 4 F.M.Module: 8M MRA Type: MRAII Number of CBU board: 2 Number of FBM: 576Mx4 Compression Function OTA: 1ns Hard Disk Capacity: 17G Communication Type: GPIB Power Comsumption: 14KVA Workstation: Sun Sparc-5 TH Mother Board: (Advantest Standard): H7-0037x01.

Memory Test system Pin Count: Driver: 288, I/O: 144 Frequency: 30 MHz O.S.Version: ASX/U-506.04-1 ALPG X:16bits, Y:16bits DC: 8 10 V PPS: 16 HV PPS: 4 F.M.Module: 8M MRA Type: MRAII Number of CBU board: 2 Number of FBM: 576Mx4 Compression Function OTA: 1ns Hard Disk Capacity: 17G Communication Type: GPIB Power Comsumption: 14KVA Workstation: Sun Sparc-5 TH Mother Board: (Advantest Standard): H7-0037x01.

Memory Test system Pin Count: Driver: 288, I/O: 144 Frequency: 30 MHz O.S.Version: ASX/U-506.04-1 ALPG X:16bits, Y:16bits DC: 8 10 V PPS: 32 F.M.Module: 1M MRA Type: MRAII Number of CBU board: 2 Number of FBM: 144Mx4 OTA: 1ns Hard Disk Capacity: 2.1G Communication Type: GPIB Power Comsumption: 14KVA Workstation: Sun Sparc-5 TH Mother Board: (Advantest Standard): H7-0037x01.

Memory Test system Pin Count: Driver: 288, I/O: 144 Frequency: 30 MHz O.S.Version: ASX/U-506.05 ALPG X:16bits, Y:16bits DC: 16 10 V PPS: 32 F.M.Module: 4M MRA Type: MRAII Number of CBU board: 2 Number of FBM: 144Mx4 Flash Option OTA: 1ns Hard Disk Capacity: 4G Communication Type: GPIB Power Comsumption: 14KVA Workstation: Sun Sparc-5 TH Mother Board: (Advantest Standard): H7-0037x01.

Memory Tester Parts Machine Currently stored in a warehouse.

Memory Testers, parts systems.

Memory Tester Parts Machines Currently stored in a warehouse.

Test systems, parts systems.

memory testers 1992-1994 vintage.

Memory Test system, parts system.

Memory Test Systems. 2 Heads, Total number of pins: IO:288-DR:576 / 1 head, CPU type: TP4, Software Rev : 6.04, Any options or spares: Sub TG. Warehoused.

Memory Testers Can be inspected Warehoused As-is.

Memory test systems, 60 MHz, crated.

test system, single-headed, full configuration.

Tester, crated and prepared for shipment The total weight is 2700KGs, 5952.4LBs and they are crated in 5 crates, details as follow: 5/1 Mainframe 220 x 130 x 205 5/2 Test Head 146 x 123 x 133 5/3 Test Head 146 x 123 x 133 5/4 Workstation 123 x 92 x 144 5/5 Mother Board 153 x 92 x 42 SYSTEM CONFIGURATION GENERATE CONFIGURATION OF TEST HEAD PIN CONFIGURATION 1. 480DR+320I/O(HALF) 2. 768DR+512I/O(FULL) 3. 960DR+640I/O(FULL) 4. 240DR+160I/O(QUARTER) [1-4] ...> 738 NUMBER OF TEST HEAD [1,2] ...........................> 728 CONFIGURATION OF TEST HEAD 1 PE BOARD TYPE 0.NO BOARD 1.BGM-023206X04 (DR+IO PE,x2 AMP) 2.BGM-023206X05 (DR PE,x2 AMP) PIN 1 13 25 CHILD A1 ....> 71 1 1 8 CHILD A3 ....> 71 1 1 8 CHILD B1 ....> 71 1 1 8 CHILD B3 ....> 71 1 1 8 CHILD C1 ....> 71 1 1 8 CHILD C3 ....> 71 1 1 8 CHILD D1 ....> 71 1 1 8 CHILD D3 ....> 71 1 1 8 CHILD E1 ....> 71 1 1 8 CHILD E3 ....> 71 1 1 8 CHILD F1 ....> 71 1 1 8 CHILD F3 ....> 71 1 1 8 CHILD G1 ....> 71 1 1 8 CHILD G3 ....> 71 1 1 8 CHILD H1 ....> 71 1 1 8 CHILD H3 ....> 71 1 1 8 CONFIGURATION OF TEST HEAD 2 PE BOARD TYPE 0.NO BOARD 1.BGM-023206X04 (DR+IO PE,x2 AMP) 2.BGM-023206X05 (DR PE,x2 AMP) PIN 1 13 25 CHILD A1 ....> 71 1 1 8 CHILD A3 ....> 71 1 1 8 CHILD B1 ....> 71 1 1 8 CHILD B3 ....> 71 1 1 8 CHILD C1 ....> 71 1 1 8 CHILD C3 ....> 71 1 1 8 CHILD D1 ....> 71 1 1 8 CHILD D3 ....> 71 1 1 8 CHILD E1 ....> 71 1 1 8 CHILD E3 ....> 71 1 1 8 CHILD F1 ....> 71 1 1 8 CHILD F3 ....> 71 1 1 8 CHILD G1 ....> 71 1 1 8 CHILD G3 ....> 71 1 1 8 CHILD H1 ....> 71 1 1 8 CHILD H3 ....> 71 1 1 8 CONFIGURATION OF DPU 1'ST DPU : STN 1,2 [Y,N] ..........................> 7YES8 TEST HEAD 1 DC CONFIGURATION [1-32] .............> 71-328 PPS CONFIGURATION [1-128] ............> 71-1288 TEST HEAD 2 DC CONFIGURATION [1-32] .............> 71-328 PPS CONFIGURATION [1-128] ............> 71-1288 AC FREQUENCY (Hz) [50,60] ........................> 7608 CONFIGURATION OF FTU FLASH OPTION [Y,N] ...........................> 7NO8 CONFIGURATION OF FM TYPE OF FM [1:NORMAL(AFM), 2:MRA4(FMRA)] ............> 728 NUMBER OF FMRA BOARD [0-8] ...........................> 788 SIZE OF FMRA BOARD [0,0G, 1:1G, 2:4G] ..............> 718 PM(PATTERN MEMORY) BOARD EXIST [Y,N] .................> 7NO8 END SAVE.

Tester, full configurations with flush option, 2 UF-200S probers included, 2001 vintage.

testers with dual head and 2 handlers.

memory test system, 2001 vintage.

memory test systems, full pins Includes: (Qty 2) TSK UF 3000.

test system, wafer sort.

Testers 2002-2003 vintage.

Testers, 12" 2003-2004 vintage.

Wafer and device memory tester 50/60Hz, full load current 175A with 2 test heads Flash test hardware option included Maximum frequency 142.8 MHz (7 ns) With (Qty 2) MICROHANDLING 'MP 921' Manipulators.

Memory testers Currently stored in a warehouse.

Memory testers, single headed systems.

Memory tester Configuration: Single testhead 650 channel Childs (A, b, c, d > 33, 41, 97, 105) DPU DC configuration: 1-4 10V PPS Config: 1-8 GPIB BGR-016793 (DPU I/F) DMM TYPE R6551: 3 AC FREQ TG Clock Option: 64 EDGES ALPG Sub PG NUMBER OF FM BOARDS: 2 MRA2 Option CBU Boards: 1 FBM BOARDS: 2.

Memory tester, dual head.

Memory tester, 12", 2006 vintage.

Testers Front-end flash memory test system Ability to simulaneously test up to 128 devices.

Memory Tester Currently stored in warehouse Many available.

Memory testers 2, 800 Channel Capacity Heads Each Head Containing 768 Channels (480 Drivers & 288 I/O) 2 DPU DC (32 Channels) 8 DPU PPS 1 ALPG 1 MRA4 Fail Memory (16 X 576M) TP4A Processor Smoke Detector - 12 Units EMO Switch 2 Test Head Mother Boards 2 Test Head Performance Boards Many available.

Memory testers, many available.

Memory tester, 12", 1999 vintage.

memory testers, very good condition, running, 1999 vintage.

Component test cell system with (2) M 6761A handlers 250MHz Clock period: 4.0ns Data rate: 250Mbit/s, ± 400pS Clock resoloution: 15.6pS Tester channel driver: 960 Tester channel I/O: 576 PPS: 64/ST (10V / 0.8A) DCU: 32/ST (16V ±128mA) Input and output voltage range: -3V to +8V Parallelism range: 64, 128, 256 Product portfolio: SDR, DDR, DDR2 1998 vintage.

Component test cell system with (2) M 6761A handlers 250MHz Clock period: 4.0ns Data rate: 250Mbit/s, ± 400pS Clock resoloution: 15.6pS Tester channel driver: 960 Tester channel I/O: 576 PPS: 64/ST (10V / 0.8A) DCU: 32/ST (16V ±128mA) Input and output voltage range: -3V to +8V Parallelism range: 64, 128, 256 Product portfolio: SDR, DDR, DDR2 Placement speed: 3000 Packages: BGA, CSP, QFP, TSOP1, TSOP2, SOJ 1997 vintage.

Component test cell system with (2) M 6761A handlers 250MHz Clock period: 4.0ns Data rate: 250Mbit/s, ± 400pS Clock resoloution: 15.6pS Tester channel driver: 960 Tester channel I/O: 576 PPS: 64/ST (10V / 0.8A) DCU: 32/ST (16V ±128mA) Input and output voltage range: -3V to +8V Parallelism range: 64, 128, 256 Product portfolio: SDR, DDR, DDR2 Placement speed: 3000 Packages: BGA, CSP, QFP, TSOP1, TSOP2, SOJ 1998 vintage.

Component test cell system with (2) M 6761A handlers 250MHz Clock period: 4.0ns Data rate: 250Mbit/s, ± 400pS Clock resoloution: 15.6pS Tester channel driver: 960 Tester channel I/O: 576 PPS: 64/ST (10V / 0.8A) DCU: 32/ST (16V ±128mA) Input and output voltage range: -3V to +8V Parallelism range: 64, 128, 256 Product portfolio: SDR, DDR, DDR2 Placement speed: 3000 Packages: BGA, CSP, QFP, TSOP1, TSOP2, SOJ 2000 vintage.

Component Test System 1998 vintage.

component tester 250MHz Clock Period: 4.0ns Data Rate: 250Mbit/s, ± 400pS Clock resolution: 15.6pS Tester channel driver: 960 Tester channel I/O: 576 PPS: 64/ST (10V / 0.8A) DCU: 32/ST. (16V ±128mA) Input and output voltage range: -3V to +8V, -3V to +8V Parallelism range: 64, 128, 256 Product portfolio: SDR, DDR, DDR2 1997 vintage.

IC tester, 2005 vintage.

memory test system and M 6721A handler.

Memory Test system with (2) M 6751A handlers.

Memory Test system, with: ADVANTEST M 6721AD handler, -30°C (can upgrade to -55°C) 2 Testheads (Testhead: D-Type) Temperature range up to +125°C 960 DR and 576 I/O ALPG: 2 1997 vintage.

Memory test systems, Currently stored in a warehouse.

Memory testers, 2-Station D-Type Test Head Test Head: 1600CH 960DR + 576I/O DPU ALPG Comes with: (2) ADVANTEST 6741AD handlers, operational Temp Range: -35°C to 125°C Note: Each unit has software that controls the temperature down to -55°C. A hardware kit needs to be installed on each unit so that the software will operate properly.

Memory testers, 12", 2004-2006 vintage.

Memory testers, 2004-2005 vintage.

D type tester with M 6741AD x 2 handlers.

memory tester, D type 1997 vintage.

memory tester, D type 1998 vintage.

Memory tester, dual D-test head system M6741AD Handler with -55°C Test Heads are mounted on Rabkin & Associates rolling manipulator stands On-line, operational, and installed Can be inspected 1999 vintage See attached for configuration.

Memory test system 2000 vintage.

Memory test system 64, 128, 256, 512, SDR, DDR, DDR2, GDDR3 2000 vintage.

Memory test system Parallelism Range 64, 128, 256, 512 2000 vintage.

Memory test system Power requirement: 250MHz Parallelism Range 64, 128, 256, 512 2000 vintage.

Memory tester Freq: 250MHz Clock Period: 4.0ns Data Rate: 500Mbit/s OTA: ± 400pS Clk resolution: 15.6pS Tester Channels, Driv: 1536/IO: 1152 SDR, DDR, DDR2, GDDR3.

memory tester with (Qty 2) M6541AD handlers.

memory testers Configuration: NUMBER OF TEST HEAD [1,2] ...........................> 2 CONFIGURATION OF TEST HEAD 1 NORMAL PIN CONFIGURATION 1 1 1 1 1 1 1 1 2 2 2 2 3 3 4 4 4 9 0 0 0 6 6 6 7 7 2 2 3 3 3 7 1 5 9 7 1 5 9 1 5 9 3 7 5 9 3 7 CHILD A-D : Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y CHILD E-H : Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y DRIVER OPTION PE CHILD A-D : NO CHILD E-H : NO CONFIGURATION OF TEST HEAD 2 NORMAL PIN CONFIGURATION 1 1 1 1 1 1 1 1 2 2 2 2 3 3 4 4 4 9 0 0 0 6 6 6 7 7 2 2 3 3 3 7 1 5 9 7 1 5 9 1 5 9 3 7 5 9 3 7 CHILD A-D : Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y CHILD E-H : Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y DRIVER OPTION PE CHILD A-D : NO CHILD E-H : NO CONFIGURATION OF DPU TEST HEAD 1 DC CONFIGURATION [1-64] .............> 1-64 PPS CONFIGURATION [1-256] ............> 1-64,97-192,225-256 TEST HEAD 2 DC CONFIGURATION [1-64] .............> 1-64 PPS CONFIGURATION [1-256] ............> 1-64,97-192,225-256 AC FREQUENCY (Hz) [50,60] ........................> 60 CONFIGURATION OF ALPG NUMBER OF ALPG [1,2,4] ..............................> 2 CONFIGURATION OF DBM DBM OPTION EXIST [Y,N] ..............................> NO CONFIGURATION OF FM NUMBER OF FM BOARD [0,2,4,8] ........................> 0 PATTERN MEMORY(PM) BOARD EXIST [Y,N] ................> NO.

Tester, 12", 2008 vintage R&D configured with one test-head System configuration list: SYSTEM:System_name = T5588 SYSTEM:Each_machine_name = QIME1 SYSTEM:AC_power_line_frequency (Hz) = 50 TH:Number_of_TH = 1 TH:Type_TH1 = 3072CH TH:Type_TH2 = PIN:Pin_configuration_TH1 = 1-28,33-56,65-92,97-120,155-160,219- 2241-28,33-56,65-92,97-120,155-160,219- 224155-160,219-224155- 160,219-224 PIN:Pin_configuration_TH2 = DP:Pps_configuration_TH1 = 1-128 DP:Pps_configuration_TH2 = DP:Dc_configuration_TH1 = 1-32 DP:Dc_configuration_TH2 = DP:Hvpps_configuration_TH1 = 0 DP:Hvpps_configuration_TH2 = ALPG:Number_of_ALPG = 2 FM:Number_of_FM = 4 FM:Size_of_FM_memory = 4.6Gbits FM:Number_of_PM = 0 FM:Size_of_PM_memory = 4.6Gbits FM:Number_of_DBM = 0 FM:Size_of_DBM_memory = 64Mwords.

Tester with full pins, currently still in production.

Tester with handlers Test Rate 1.066 GHz ALPG 16X, 16Y, 18 bits 2x data (Qty 2) Test stations Pin configuration 576 DR + 768I/O per STN DPU - DC 32 CH/STN 10V PPS 128 CH/STN DBM 1M word FM 8 Gbits (Qty 2) ADVANTEST M6741A handlers (2000 vintage) UPH Approximately 3000 pcs/hr Heating system chamber type Set temperature -30ºC to 125ºC Max Parallelism 32 pcs (Qty 7) stockers (Qty 2) single stockers crated in a warehouse 2001 vintage.

Tester, 8", 2001 vintage.

test cell system, single testhead.

DRAM Test System Computer: TP6B Test Processor Blade150A Engineering Work Station 80G HDD 80G 256M RAM Single 19" LCD Monitor Standard System Desk Test Station: 2 Test Station(s) 1536DR / 1536IO (Full) Pin Configuration 96DR / 48IO FC Configuration DC: 64 DC (STN 1) 320 PPS (STN 1) 64 DC (STN 2) 320 PPS (STN 2) Memory Test: ALPG Production Integration: 2 Control Box 2 M6542AD Adapter Frame 1 Cable Duct 2STN Trigger Output Terminal Smoke Sensor EMO Switch Second Ethernet Connection Kit TP PCI Bus I/F GPIB 2 T5593 128-DUT SBC MB/Diag Also included: (2) M6542AD Panel: TFT Color LCD Monitor Color Signal Tower Keyboard (with EMO) Chamber: Soak Chamber Test Chamber Exit Chamber IC Device Cooling Option -55 Deg Option Dry Air TH Unit LN2 Valve (IC Device Cooling Option) LN2 Valve (Mainframe) Air Flow Meter Handling: Load Arm Unloader Arm Tray Stocker (9 Elevator) Interface: M6542AD HiFix Cover Contact Attachment (32/64/128 Site) Test Head Positioner GPIB 2007 vintage.

Memory tester Test Station: 1536CH 2STATION (half-head) 576DR / 768IO / STN FC 72CH DC: 32CH/STN PPS: 128CH/STN ALPG: 4 (X=18, Y=18) PDS: 8 DBM: 1M FMRA: None Tester Processor: TP6B User Workstation: Sun Blade 100 ADVANsite Software 6.04B2 M7211A Cal robot Interface for Advantest M6771AD handlers 2006 vintage.

test system (stand alone).

test system and M 6671AD handler (1) Head, (32) fold configuration DSA boards included CE marked Configuration: /DIAG/R 0.UPDATE DATA FILE & RETURN 1.RETURN TO SYSTEM(NOT UPDATE DATA FILE) 2.LIST UP BOARD-NAME/REVISION 3.CHANGE BOARD-NAME/REVISION SELECT <0-3> ................................> 2 LIST UP BOARD-NAME/REVISION UNIT NAME : TG/TP ALPG FM DPU FTU SCU TH1 TH2 FMMDL AIR COOLUNIT (ALL) SELECT .....> 7878ALL SYSTEM CONFIGURATION LIS PRINT OUT AT 2005/01/20 09:39:33 SYSTEM IDENTIFICATION CONFIGURATION OF TEST HEAD NUMBER OF TEST HEAD [1,2] ..........................> 1 CONFIGURATION OF TEST HEAD 1 (0:NOT EXIST 1:NORMAL BOARD 2:HSC BOARD) 1 1 1 1 1 1 1 2 2 2 2 3 3 4 5 9 0 0 1 6 6 7 7 2 3 3 4 3 9 5 1 7 3 9 5 1 7 3 9 5 1 7 3 A A A A A A A A A A A A A A A A CHILD A1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 CHILD A3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CONFIGURATION OF DPU TEST HEAD 1 DC CONFIGURATION [1- 64] ...........> 1-32 10V PPS CONFIGURATION [1-320] ...........> 1-128 AC FREQUENCY (Hz) [50,60] ...........> 50 CONFIGURATION OF ALPG SUBALPG OPTION EXIST [Y,N] .........................> NO CONFIGURATION OF DBM DBM OPTION EXIST [Y,N] .............................> NO CONFIGURATION OF FM NUMBER OF FM BOARD [0,2,4,8] ........................> 0 CONFIGURATION OF SC DQS ANALIZER OPTION EXIST [Y,N] ....................> NO BOARD-NAME/REVISION LIST PRINT OUT AT 2005/01/20 09:39:33 SYSTEM IDENTIFICATION MCI1 UNIT NAME << TG/TP >> SLOT BOARD-NAME REV DATE 1 WUN-5V2V5V2R5V5V 2003/08/08 08:38:03 2 BGR-022449 AFB 2003/08/08 08:38:03 3 BGR-027685 BDA 2003/08/08 08:38:03 4 BGR-027705 ADA 2003/08/08 08:38:03 5 BGR-027705 2003/08/08 08:38:03 6 BGR-025708X02 CEB 2004/09/14 11:27:38 7 BGR-027591 AFA 2003/08/08 08:38:03 8 WBL-H3610027TP6A F-D 2004/09/14 11:27:38 9 WUN-5V2BDM2B3V 2003/08/08 08:38:03 BWB KH3-2484 2003/08/08 08:38:03 CPU WBL-H3610027CPU --A 2003/08/25 18:06:13 WSIF BGC-026884 AFD 2004/02/23 11:30:55 2004 vintage.

test system with M 6542AD handler, 2005 vintage.

Test system, 1/4 head.

Tester 533MHz Parallelism Range 32; 64 Product Portfolio DDR2, GDDR3 2003 vintage.

Tester, 2006 vintage.

Memory test system with TSK UF200SA system, 8”, currently installed, can be inspected, 2003 vintage.

Testers Standard 16 Site Per Head, Dual Head Configuration Test Frequencies up to 100MHz 4 DC Channels Per Site 4 PPS Channels Per Site 4 HVPPS Channels Per Site DMM – R6552T-R ALPG 16X, 16Y, 16Z 288 Mbit Pattern Memory Fail Map Memory - 256 Mbit Capacity, 64 DFM Capacity Micro Plus+ 1000 Workstation Set Cable Ducts 2002 vintage.

LCD driver test system with ELECTROGLAS 4090 prober manipulator Successfully removed tdl files Successfully started file /tmp/advantest/_default/hardware.tdl ******************************************************************************* * DIAGNOSIS VERSION R2.06-1 (for viewpoint R8.01 or later) * * SYSTEM NAME T6361 PHIL6 * * DIAGNOSIS STARTED AT 2005/11/18 06:49:43 * ******************************************************************************* ----- SYSTEM CONFIGURATION INFORMATION -------------------------------------- PIN CONFIGURATION MAINFRAME : 1 - 128 TH1 [CTD ] : 1 - 128 LCD : 1 - 1024 RVS : 1 - 64 DPU CONFIGURATION UDC CH : 1 - 4 MDC CH : 1 - 8 PPS CH : 1 - 16 HVDC CH : 1 - 64 LINE FREQUENCY : 50Hz DMM MODEL : R6581T SQPG CONFIGURATION MAX VGC : 4MW MAX CTB : 8MW MAX TTB : 8MW OPTIONS CONFIGURATIONS : SCPG OFF ALPG OFF 40VPPS OPTION 40VPPS CH : 17 - 24 AQM OPTION AQM BLOCK : 1 - 12 HI-FIX TYPE : 256B ----------------------------------------------------------------------------- Full diagnostic test report available upon request De-installed ~2008 Working condition prior to deinstallation.

Test system, 2005 vintage.

Test system Bicmos2-384 Channels one station prober Test station with control panel GTE/pin, 32TS timing generator 16MW STE vector 256W, 2 bits/pin data fail memory Scan pattern generator option PDS option-0-256 CH SCPG Option-5122 Meg x 2 I/O Programmable power supplies: 5 amp, 10 volts x 8 channels Universal DC parametric measuring unit: 2 sets/256 pins Multi DC parametric measuring unit: 8 sets/256 pins FM3 option TC2 Sparc Tester Controller 64 Mbyte, 2.1 G hard disc, GPIB port, CD-Rom, 3.5 floppy drive and 21 inch color monitor AG/AE probing assembly Performance board Robot calibration unit System was in working condition when removed from plant.

Tester, configuration: MAINFRAME : 1 - 512 TH1 [CTD ] : 1 - 512 DPU CONFIGURATION DPS CH [TH1] : 1 - 16 UDC CH [TH1] : 1 - 4 MDC CH [TH1] : 1 - 32 DPS HS MODE : OFF DPS PSRR : OFF LINE FREQUENCY : 60Hz DMM MODEL : R6581T SQPG CONFIGURATION MAX VGC : 1MW MAX CTB : 64MW MAX TTB : 16MW OPTIONS CONFIGURATIONS : HRS OFF SCPG ON ALPG OFF MIXED OFF MIXED2 OFF OPTION PG MAX SCPG : 16Gbit PDS : 1 - 512 MDS [TH1] : FMUX [TH1] : HI-FIX TYPE [TH1] : 512[512+Mixed].

Memory Tester Currenly stored in a warehouse.

testers. Running, excellent condition, 2000-2002 vintage.

IC testers, 1995 vintage.

Test system, 1995 vintage.

Optical Surface Analysis Tools.

optical spectrum analyzer.

Optical Surface Analysis Tool.

optical spectrum analyzer.

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final test

FINAL TEST