Used TEL / TOKYO ELECTRON Alpha 8SE #182012 for sale
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ID: 182012
TEOS furnace, L-type
Medium temperature
General Configuration:
Safety Specification: TEL Standard
System Layout Type: 200mm configuration
System Paint Color: Biege white
Furnace Front Surface Finish: Painted / SS
Process Pressure (Torr): N/A
Process Temperature (ºC): 1000 (Max)
FTP Heater: Not Installed
Rapid Cooling Unit: Not Installed
Heater Type: Mid Temp VMM-40-101
Process Gasses:
Process Gas 1: N2 -
Process Gas 2: O2 -
Process Gas 3: ClF3
Process Gas 4: TEOS
Cleaning Gas 1: SETC-TEOS 200cc
Cleaning Gas 2: N/A
Gas Distribution System:
Basic Style: Integrated Gas System (Fujikin)
Tubing Material: Stainless Steel
Tubing Finish: Electro-polished
Tubing Bends: Mechanical Bends OK
Manual Valve: Fujikin
Air-Operated Valve: Fujikin
Filter: Millipore
Regulator: Fujikin
MFC: AERA
Press. Transducer: MKS/NAGANO KEIKI
Press. Transducer Display Reference: Compound
External Torch Unit: Std Flow Torch
Vaporizor: N/A
Liquid Source Auto-Refill: N/A
Auto-Refill Provided By: N/A
Auto-Refill Tubing Interconnect By: N/A
Auto-Refill Power Provided By: N/A
Gas System Schem. Dwg / Parts List: TEL Supplied
Panel Heater for Furnace Opening: N/A
Wafer/Cassette Handling:
Wafer Type: 200mm SEMI STD Notch
Wafer Notch / Flat Aligner: Installed
Cassette Type: Fluoroware KA200-80MHR
Cassette -Number of Wafers: 26
Cassette Storage Qty.: 21 or 16
Monitor Cassette Operation: IN In-batch/OUT In-batch
Cassette In-Out Sequence: In -P1,P2,..,M / Out -P1,P2,..,M
Transfer-stage Protrusion Sensor: Installed
Fork Type/Material: 1+4 / Al203
Fork -Wafer Presence Sensor: Installed
Fork -Wafer Position Sensor or Guide: Installed (Position Sensor)
Fork -Variable Pitch: Installed
Wafer Loading/Unloading Sequence: ED-->P-->M / M-->P-->ED
System Controls:
System Controller: Waves
Remote MMI and Gas Flowchart: FPD & GFC Installed
Signal Tower / Colors: Installed / 4-Color
Signal Tower Location(s): (Furnace Front)
Temperature Control:
Furnace Temperature Controller: M560A
Facility Elect. -Equip. Pwr Input( 2 line):
Voltage 3phase: 208VAC, 125A, 50Hz
Voltage 1phase: 100VAC, 50A, 50 Hz.
TEL / TOKYO ELECTRON Alpha 8SE is a diffusion furnace and accessory equipment which is used for producing epitaxial and ion implanting wafers. This system is suitable for medium to large scale production of semiconductor wafers used in the manufacture of computer chips and other electronic components. TEL ALPHA-8SE diffusion furnace has a temperature range of 400°C to 1050°C and is equipped with multiple GaAs sources. The four independently adjustable quartz lamps can provide steady-state homogeneous heating across the entire wafer surface. In addition, the unit offers proprietary control algorithms which allow user to program the sequence of quartz lamp activation and deactivation. The inside of the furnace is designed for reduced contamination, with a ceramic lined chamber and a removable inner crucible liner for easy cleaning. This machine is equipped with two concentric load-lock chambers for easy and safe loading and unloading of wafers. An automated cassette-to-cassette transfer tool is also included for increased efficiency. This asset also acknowledges the presence of different shaped and sized wafers using an advanced optical recognition model for improved handling of wafers. TOKYO ELECTRON ALPHA-8 SE diffusion furnace is designed with safety features such as an auto-shutoff equipment and a ground fault circuit interrupter. This system also comes with programmed alarm/logging capabilities which alert operators of current and potential problems. Other features such as full-fledged computer interfaces and remote operation are also available. Overall, TOKYO ELECTRON Alpha 8SE diffusion furnace and accessory unit is an efficient and accurate solution for a variety of semiconductor wafer production applications. This machine provides a safe and reliable environment for high-precision fabrication of epitaxial and ion implanting wafers. The advanced control tool and accessories provide an operator with the necessary tools for maximizing wafer yield.
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