Used TEL / TOKYO ELECTRON Trias #9362298 for sale

TEL / TOKYO ELECTRON Trias is an etcher/asher equipment equipment from TEL specifically designed for the thinning and patterning of compound semiconductor layers on wafers. This system builds on TOKYO ELECTRON long-term expertise in the semiconductor equipment industry to bring users the latest technology in precision etching and ashing processes. TEL Trias utilizes direct current (DC) etching and elemental reactive ion etching (RIE) to thin layers of compound semiconductors or etch patterned features. By itself, TOKYO ELECTRON Trias can etch using O2-plasma, NF3-plasma, CF4-plasma, and Ar-plasma. Trias can also be combined with other plasma sources such as SiH4-plasma, N2O-plasma, and O2F2-plasma. A key feature of this unit is the Uniformity Control Option (UCO); which helps to improve the uniformity of etching across all wafer regions. This option uses a fully automated controller to control the etch rates of different films for each wafer location. This process assists in generating more uniform etchings across and through each wafer. TEL / TOKYO ELECTRON Trias is also designed to decrease the amount of waste chemicals generated during the etching process. There is an End Point Stop option which makes the etching process finish at a predetermined point. This reduces the amount of energy and material used for each run of etching and makes the machine more environmentally friendly. TEL Trias is also equipped with many sophisticated safety features. Temperature, pressure, and gas levels are monitored throughout the etching process. Furthermore, there is an emergency shut-off switch which quickly shuts down the process when any abnormal chemical or temperature readings are detected. In conclusion, TOKYO ELECTRON Trias is a efficient, reliable, and safe etching tool designed to meet the demands of the semiconductor industry. With its superior etching accuracy, UCO option, and built-in safety features; Trias is well-suited for etching compound semiconductor layers and patterned features onto wafers.