Used LTX-CREDENCE ASL3K #9129476 for sale
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ID: 9129476
Test head slot assignment,
Slot 1: OVI-30
Slot 2: OVI-30
Slot 3: OVI-30
Slot 9: DVI-2K
Slot 11: DVI-2K
Slot 13: DVI-2K
Slot 15: DVI-2K
Slot 23: MDI
Slot 27: CLK4
Slot 28: Baseband transition
RF board configuration
Front of MVNA
Slot 1:
1. VMIC
2. Controller
3. GPIB
Slot 3: G4 Receiver
Slot 4: G4 Receiver
Slot 5: G4 Receiver
Slot 6: G4 Receiver
Slot 7:
1. IQ Source
2. dig IQ
3. analog IQ
Slot 9: RF control
slot 11:
1. BBAWG
2. BBAWG
3. IQ Mezz
slot 13:
1. BBACP 1
2. BBACP
3. BBACP analog
Slot 14:
1. BBACP 2
2. BBACP
3. BBACP analog
Back of MVNA
Slot 1: VMIACC
Slot 4: 2nd Lo
Slot 5: 2nd Down
Slot 6: 2nd Down
Slot 8: CLK dist
RF Control motherboard
RF brick 8 port
Slot 0: IF mux 1
Slot 1: HPPM 8port 1
Slot 2: HPPM 8port 3
Slot 3: HPPM 8port 5
Slot 4: HPPM 8port 7
Slot 5: Lo splitter
Slot 6: RF mux
Slot 7: HPPM 8port 8
Slot 8: HPPM 8port 6
Slot 9: HPPM 8port 4
Slot 10: HPPM 8port 2
Slot 11: IF mux 2.
SMIQ :
RF source1
RF source2
RF source3
LO.
LTX-CREDENCE ASL3K is a final test equipment designed to measure chip performance, process stability, and connectivity integrity. The system is composed of a test plan engine, a design implementation and verification suite (DV), and an on-site touch-screen panel. This unit is used to ensure chip operation in both general use and rigorous performance tests. The test plan engine is powered by an ATOM processor and controls the sequences and workloads that are sent to the chipsets. This engine is running a real-time operating machine (RTOS) that can prioritize and queuing tasks, as well as support communication between the tool components. The DV suite is used for the initial design implementation. It is powered by software tools for schematic designs, transistor-level parasitic simulations, and power analysis. Once design implementation has been completed, verification is performed to determine the correctness of the design. This suite runs a combination of simulation and electro-magnetic signal integrity (EMSI) for detailed verification. The on-site touch-screen panel includes customizable display widgets that can be used to capture, graph, and actuate specific device characteristics. It communicates with the asset over a CAN bus (Controller Area Network) that allows for remote control. Once ASL3K is in use, its test model can be tuned to specific algorithms to test a chipset's behavior before and after calibration under various parameter settings. This equipment is capable of extensive performance monitoring, providing access to the status of all its components in real-time. Reports can be generated to compare results across different settings and different versions of chip designs. The system can also provide per-pin monitoring and debugging capabilities. Overall LTX-CREDENCE ASL3K provides reliable, fast, and accurate test and measurement capabilities for chip designs. It is an ideal unit to validate the performance, reliability, and connectivity of a chipset prior to production use.
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