Used TERADYNE A565 #9006373 for sale

TERADYNE A565
Manufacturer
TERADYNE
Model
A565
ID: 9006373
VLSY-System, CT69 Configuration: ct69t is a 1 processor system Processor 1: 440 MHz sparc (online) PCI based system Terabus is present Board ID 949-824-00 TCI is present PATH_II_TH 1 CONFIGID 949-688-01 #Slot Type Num XptA XptB Name 1 879-943-01 0 # 0 0 H50 TDR 2 879-936-00 0 # 0 0 H50 THS 3 879-935-65 0 # 0 0 HSD25 DTH 4 879-935-65 0 # 0 0 HSD25 DTH 5 879-935-65 0 # 0 0 HSD25 DTH 6 879-935-65 0 # 0 0 HSD25 DTH 7 879-935-65 0 # 0 0 HSD25 DTH 8 879-935-51 0 # 0 0 H50 DTH 17 000-000-00 0 # 5 6 EMPTY 18 879-858-25 0 # 7 8 PLFS CC 19 879-858-35 0 # 9 10 PLFD CC 20 879-853-01 0 # 11 12 HF DIG CC 21 000-000-00 0 # 13 14 EMPTY 22 879-906-04 0 # 15 16 VHFAWG CC 23 879-792-00 0 # 17 18 TIME CC 24 879-906-04 0 # 19 20 VHFAWG CC 25 879-754-00 0 # 21 22 CDIG CC 11 879-656-00 0 # 0 0 RDC48 15 949-679-00 0 # 3 3 HUC 200 12 879-653-00 0 # 0 0 HAC 13 879-654-00 0 # 0 0 TACH 14 879-667-01 0 # 0 0 PATH II CAL 16 879-834-01 0 # 0 0 Analog Data Buffer AL END PATH_II_TH 2 CONFIGID 949-688-01 #Slot Type Num XptA XptB Name 1 879-943-01 0 # 0 0 H50 TDR 2 879-936-00 0 # 0 0 H50 THS 3 879-935-65 0 # 0 0 HSD25 DTH 4 879-935-65 0 # 0 0 HSD25 DTH 5 879-935-65 0 # 0 0 HSD25 DTH 6 879-935-65 0 # 0 0 HSD25 DTH 7 879-935-65 0 # 0 0 HSD25 DTH 8 879-935-65 0 # 0 0 HSD25 DTH 17 000-000-00 0 # 5 6 EMPTY 18 879-858-25 0 # 7 8 PLFS CC 19 879-858-35 0 # 9 10 PLFD CC 20 879-853-01 0 # 11 12 HF DIG CC 21 000-000-00 0 # 13 14 EMPTY 22 879-906-04 0 # 15 16 VHFAWG CC 23 879-792-00 0 # 17 18 TIME CC 24 879-906-04 0 # 19 20 VHFAWG CC 25 879-754-00 0 # 21 22 CDIG CC 11 879-656-00 0 # 0 0 RDC48 15 949-679-00 0 # 3 3 HUC 200 12 879-653-00 0 # 0 0 HAC 13 879-654-00 0 # 0 0 TACH 14 879-667-01 0 # 0 0 PATH II CAL 16 879-834-01 0 # 0 0 Analog Data Buffer AL END # # Up to 4 Precision AC Card Cages are allowed # PRECISION_AC 1 #Slot Type Num Name 1 879-765-04 0 # PLFDIG 2 879-764-01 0 # PLFSRC 3 879-779-00 0 # 1M SMEM 4 879-772-01 0 # HFDIG 5 879-742-20 0 # CMEM 6 949-608-00 0 # VHFAWG 7 949-608-00 0 # VHFAWG 8 879-781-00 0 # PACS CAGE INT END # # Up to 8 Universal Backplane/Synch Power Subsystem # cages are allowed # # For the Synch Power Subsystem: # Slot Type Name Instr1 # Instr2 # Ammeter # # # Instr1 # - insrument connected to the first two matrix lines # Instr2 # - insrument connected to the last two matrix lines # Ammeter # - ammeter connection # to AVOID errors, put NO 0 if no instrument is connected. # # UB_SPS_CAGE 1 # Slot Type Num Name 1 879-802-02 0 # UB_SPS_802 2 517-301-00 0 # UB_APU 3 517-301-00 0 # UB_APU 4 517-301-00 0 # UB_APU 5 517-301-00 0 # UB_APU 6 517-301-00 0 # UB_APU 7 517-301-00 0 # UB_APU 8 517-301-00 0 # UB_APU 9 517-301-00 0 # UB_APU 10 517-301-00 0 # UB_APU 11 517-301-00 0 # UB_APU 12 517-301-00 0 # UB_APU 13 517-301-00 0 # UB_APU 14 879-925-01 0 # UB_60_V_SRC MAT 1 15 879-925-01 0 # UB_60_V_SRC MAT 2 16 879-925-01 0 # UB_60_V_SRC DUT 1 17 879-925-01 0 # UB_60_V_SRC DUT 2 20 879-690-00 0 # UB_ASY 22 517-300-00 0 # UB_TJ300 END HSD50_CHAN_CAGE 1 #Slot Type Num Name 1 879-933-65 0 # HSD25 DMF 2 879-933-65 0 # HSD25 DMF 3 879-933-65 0 # HSD25 DMF 4 879-933-65 0 # HSD25 DMF 5 879-934-01 0 # H50 MFS 6 879-933-65 0 # HSD25 DMF 7 879-933-65 0 # HSD25 DMF END HSD50_SEQ_CAGE 1 #Slot Type Num Name 2 879-945-01 0 # H50 AFO 4 879-942-05 0 # H50 SFO 5 879-934-01 0 # H50 MFS 6 879-937-02 0 # H50 SCM 7 879-938-01 0 # H50 DMC END HSD50_DIG_SIG_CAGE 1 #Slot Type Num Name 1 879-953-00 0 # VBF 2 879-939-01 0 # DSI 3 879-745-00 0 # S_MEM 4 879-957-00 0 # DCB 5 879-742-40 0 # C_MEM 9 879-731-00 0 # CAGE INTR END # # Trigger Switch Yard # # Note: The logical slot numbers below correspond to the physical slot # numbers only for test systems which contain a TSY card # cage. In test systems which contain an SCS/TSY card cage the # mapping is: # # Logical TSY slot (below) Physical slot # 1 -> 2 # 3 -> 1 # TSY CAGE #Slot Type Num Name 1 879-655-02 0 # TSY 2 000-000-00 0 # EMPTY 3 000-000-00 0 # EMPTY 4 000-000-00 0 # EMPTY END # # Time Subsystem # TIME_SUBSYSTEM # Board ID Name 879-793-00 # TMS Timer 879-794-01 # TMS Counter 879-795-01 # TMS Support END # # DC Subsystem - # # SRC <NUM> [1 - 13] # (sources 1-5 are MATRIX sources 1-5 # sources 6-13 are DUT sources 1-8) # HCU <NUM> *[1 - 4] # REF HCU <NUM> *[1 - 4] # HVSRC <NUM> *[1 - 4] # PWRSRC <NUM> [1 - 4] # DATABITS <NUM> - <NUM> [1 - 192] # # ** These instruments share the same seven-slot cage -- only one # instrument is allowed per slot. # DC_SUBSYSTEM # UBVI 60 1 ( 60V V/I Source in Universal Backplane 1 : slot 14) # UBVI 60 2 ( 60V V/I Source in Universal Backplane 1 : slot 15) HCU 4 # UBVI 60 6 ( 60V V/I Source in Universal Backplane 1 : slot 16) # UBVI 60 7 ( 60V V/I Source in Universal Backplane 1 : slot 17) HCU 8 DATABITS 1 - 48 # UB_MATRIX # # Testhead 1 # XPTs UB Cage Slot Type # 1-4 1 2 APU # 5-8 1 3 APU # 9-12 1 4 APU # 13-16 1 5 APU # 17-20 1 6 APU # 21-24 1 7 APU # 25-28 1 8 APU # 29-32 1 9 APU # 33-36 1 10 APU # 37-40 1 11 APU # 41-44 1 12 APU # 45-48 1 13 APU # # Testhead 2 # XPTs UB Cage Slot Type # 1-4 1 2 APU # 5-8 1 3 APU # 9-12 1 4 APU # 13-16 1 5 APU # 17-20 1 6 APU # 21-24 1 7 APU # 25-28 1 8 APU # 29-32 1 9 APU # 33-36 1 10 APU # 37-40 1 11 APU # 41-44 1 12 APU # 45-48 1 13 APU END.
TERADYNE A565 is a leading-edge "final test" equipment designed for high-performance applications in the semiconductor industry. It is a comprehensive and efficient system for testing both small and large device volume. It is a fully automated tester that provides enhanced parallel probing capabilities to reduce cycle time and improve fine pitch probing. Its mechanical configuration is specially designed to enable optimal test coverage for the semiconductor industry. The unit is also made to be operationally efficient, coordinated to manage large test architectures and reduce test costs. A565 is a highly customizable and scalable platform that meets the needs of many tests in both production and development. Its superiority comes from its modular design. Its advanced modular architecture allows it to combine several test components into a single frame. It is also attachable to associated equipments such as automated test equipment (ATE), power supplies, and other instruments as needed. The main components that make up TERADYNE A565 are the specialized test machine platform, testhead, platform connectors, test pads, probers, and image capture. All of these components come together to form the complete tool. The test asset platform contains the test control software and group synchronization software. The testhead contains the software program for the allocation and control of the tester's measurement functions. The platform connectors enable powerful communication between the volatile memory and the designated test area. The test pads are the surfaces that mount the probers and offer optimum probing in the test model's environment. The probers are specialized units that measure electrical characteristics of the device under test (DUT). Finally, the image capture captures and stores images of the device being tested. A565 is a highly reliable equipment which is designed to be capable of performing at very high rates of speed and high capacity. It is also capable of responding quickly to high speed operations and dynamically changing conditions. The test system is designed for high precision and accuracy with a precise detection unit that can detect up to 0.6um resolution. It also features advanced touch-insensitive probe technology to ensure that it provides superior probing accuracy for high-reliability tests. To complement its capability, TERADYNE A565 can accommodate optional machine features such as automatic probe wash-down, automatic fail history, and advanced vision systems for vision-guided device probing. It also provides Automatic Test Program Generation (ATPG) capabilities and several diagnostic options. With all of these features, A565 proves to be a leader in efficient and cost-effective semiconductor test solutions.
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