Used MECS UTC-100 #9097815 for sale

Manufacturer
MECS
Model
UTC-100
ID: 9097815
Wafer handling robot
MECS UTC-100 wafer handler is an advanced robotic equipment designed to automate the process of transferring and aligning semiconductor wafers aggressively and precisely during III-V semiconductor device fabrication. It is the first robotic wafer handler system to accommodate a wide range of wafer sizes up to 200mm, ranging from 6 inch to 12 inch wafer diameters. It is capable of handling a wide variety of substrate sizes, shapes and materials, including (but not limited to) SiC, GaAs, and InP wafers. UTC-100 wafer handler is designed to provide maximum automation with maximum flexibility. It makes use of a powerful robotic arm, capable of up to six axes of motion, to manipulate the wafer with pin-point precision. The robotic arm is able to move a wafer as small as one millimeter across large vacuum chambers for extremely accurate alignment of the wafer in the processing area. It is also designed to be expandable, allowing it to be integrated into a variety of existing or new semiconductor devices fabrication facilities. The wafer handler is also capable of automating the process of transferring the wafer from one pedestal to another, minimizing the possibility of human error and creating a more efficient and accurate workflow. MECS UTC-100 also has an advanced vision unit that precisely locates the wafer position with impressive accuracy of up to one micron. With its robust high accuracy vision machine and intuitive user interface, it is able to quickly identify and locate the wafer-glass-substrate alignment. UTC-100 wafer handler is able to efficiently operate to meet the growing demands of the III-V semiconductor device fabrication processes. It is a highly advanced and reliable robotic tool specifically created to provide maximum automation with high precision. MECS UTC-100 is an excellent automation tool for III-V semiconductor device fabrication process, allowing for efficient and accurate line tracking while providing maximum protection for the wafer from potential contamination levels.
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