Used CENSOR ANS 500 #9251757 for sale

CENSOR ANS 500 is a wafer testing and metrology equipment designed for inspecting semiconductor wafers and other thin surfaces. The system uses advanced imaging techniques to map the structure and critical features of wafers, providing high-precision analysis and measurements. ANS 500 unit consists of several components, including a semiconductor wafer holder, a high-resolution CCD camera, a chromatic confocal microscope, a spectrometer, and a spectrometer control unit. The wafer holder can be adjusted to accommodate a variety of wafer thicknesses, ranging from approximately 0.25 to 8.0 mm. The CCD camera can capture large-scale two-dimensional images of the wafer, with a maximum resolution of 2880 x 2160 pixels. The chromatic confocal microscope processes these images to provide high-resolution images of the wafer's surface features, including line widths, gate length, and profile shape. The spectrometer component of CENSOR ANS 500 machine measures the frequency and amplitude of amplitudes of light emitted or reflected from the wafer. This measurement can help to identify defects such as non-uniform thicknesses or inconsistencies in the layer structure. The spectrometer control unit processes the spectrometer measurements to provide data on particle size, particle alignment, chemical composition, and thermal uniformity of the wafer. In addition to imaging, ANS 500 tool can perform a number of other tests. These tests include testing for electrostatic discharge (ESD), chemical composition, and electrical characteristics. The asset can also be used to identify faults or anomalies on the wafer, and to generate contour maps of surface defects. CENSOR ANS 500 model provides a full range of wafer testing and metrology capabilities. By combining imaging, measurement, and testing, it offers precise and reliable results with minimal disruptions to the production process. The equipment is compatible with a variety of wafers, and can be adapted to handle next-generation devices with advanced design complexity.